This project is funded by the European Commission under the sixth EU Framework Programme for Research and Technological Development (Project Reference: IST-016677).
This Web site is the center of exchange for all data regarding Metamos activities, the life of the project and all the information that might be relevant.
Among the main difficulties to overcome toward the 10 nm gate length MOSFET, many challenges are associated to the source/drain (S/D) regions. The tight constraints of dopant activation to achieve very highly doped junctions, extremely steep lateral profiling, low contact specific resistance have motivated a renewed interest in MOSFETs architectures that integrate metallic Schottky S/D. Based on that background, the METAMOS project proposes the design, optimisation, fabrication and characterization of metallic Schottky-Barrier-like MOSFETs to solve critical problems associated to the source/drain architecture and more specifically due to the specific contact resistance at the metal (or silicide) to silicon interface. The first major objective is to develop and fully characterize advanced very low Schottky barriers (<0.1 eV) primarily based on (but not limited to) silicides of platinum and iridium for p-type contacts and rare earth silicides (erbium, ytterbium) for n-type contacts. The second objective is to demonstrate the complete integration of metallic source/drain (S/D) in a complementary MOS technology at academic level as a test bed to operate the appropriate selection of contact materials and process flow for industrial exploitation. The third objective concentrates on the implementation of metallic S/D into bulk and SOI CMOS process cores to demonstrate the transfer from a laboratory concept to an industrially viable solution. Finally, the fourth general objective is to get a definitive answer on the ability of metallic S/D MOSFETs and of non-overlap architectures to outmatch the conventional one, based on device demonstration, wideband measurements, physical modelling and comparison with CMOS state-of-the-art and ITRS requirements. To reach this goal, the project is organized in 4 technical workpackages covering:
- material engineering,
- process integration,
- device simulation and modelling and
- material and device characterization;
Final Publishable Activity Report of the METAMOS project Download here
List of published material issued from the METAMOS collaborative work Download here
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International Journals |
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[1] |
G. Larrieu, E. Dubois, X. Wallart, J. Katcki |
J. Appl. Phys. 102, 094504, 2007 |
Kinetics, stochiometry, morpholophy and current drive capabilities of Ir-based silicides |
[2] |
N. Breil, A. Halimaoui, E. Dubois, G. Larrieu, A. Laszczc, J. Ratajczakc, G. Rolland, A. Pouydebasque, T. Skotnicki |
Appl. Phys. Lett. 91, 232112, 2007 |
Selective Etching of Pt with respect to PtSi using a Sacrificial Low Temperature Germanidation Process |
[3] |
X. Tang, N. Reckinger, G. Larrieu, E. Dubois, D. Flandre, J.P. Raskin, B. Nysten, A..M. Jonas, V. Bayot |
Nanotechnology 19, 165703, April 2008 |
Characterization of ultrathin SOI film and application to short channel MOSFETs |
[4] |
N. Reckinger, X. Tang, V. Bayot, D.A. Yarekha, E. Dubois, S. Godey, X. Wallart, G. Larrieu, A. Łaszcz, J. Ratajczak, P.J. Jacques, J.P. Raskin |
J. Appl. Physics 104, 103523, 2008 |
Low Schottky barrier height for ErSi2−x /n-Si contacts formed with a Ti cap |
[5] |
A. Laszcz, J. Ratajczak, A. Czerwinski, J. Katcki, V. Srot, F. Phillipp, P.A. van Aken, N. Breil, G. Larrieu, E. Dubois |
Materials Science and Engineering B, 154–155, pp 175–178, Dec 2008 |
Transmission electron microscopy study of the platinum germanide formation process in the Ge/Pt/SiO2/Si structure |
[6] |
N. Reckinger, X. Tang, V. Bayot, D. Yarekha, S. Godey, E. Dubois, X. Wallart, G. Larrieu, A. Laszcz, J. Ratajczak, P. Jacques, J.P. Raskin |
Appl. Phys. Lett. 94, 191913 2009 |
Amorphous to crystalline transition of Er silicide upon thermal annealing and impact on the Schottky barrier height |
[7] |
X. Tang, B. Nysten, N. Reckinger, D. Flandre, J.P. Raskin, E. Dubois, V. Bayot |
IEEE Transactions on Nanotechnology, vol. 8, n°5, pp 611-616, September 2009 |
A Simple Method for Measuring Si-Fin Sidewall Roughness by AFM |
[8] |
X. Tang, N. Reckinger, V. Bayot, D. Flandre, E. Dubois, D. A. Yarekha, G. Larrieu, A. Lecestre, J. Ratajczak, N. Breil, V. Passi, J.-P. Raskin |
Appl. Phys. Lett. 95, 023106 2009 |
An electrical evaluation method for silicidation of silicon nanowires |
[9] |
D. Yarekha, G. Larrieu, N. Breil, E. Dubois, S. Godey, X. Wallart, C. Soyer, D. Remiens, N. Reckinger, X. Tang, A. Laszcz, J. Ratajczak, A. Halimaoui |
Electro Chemical Society ECS transactions, vol. 19, n° 1, pp 339-344 May 2009 |
UHV Fabrication of the Ytterbium Silicide as Potential low Schottky Barrier S/D Contact Material for n-type MOSFET |
[10] |
F. Cornu-Fruleux, J. Penaud, E. Dubois, P. Coronel, G. Larrieu, T. Skotnicki |
IEEE Electron Device Letters vol. 28, pp 523-526, June 2007 |
Spacer-First Damascene-Gate FinFET Architecture featuring Stringer-free Integration |
[11] |
N. Breil, E. Dubois, A. Halimaoui, A. Pouydebasque, G. Larrieu, A. Łaszcz, J. Ratajczak, T. Skotnicki |
IEEE Electron Device Letters, vol. 29, pp 152-154, February 2008 |
Integration of PtSi in p-type MOSFETs using a Sacrificial Low-Temperature Germanidation Process |
[12] |
G. Larrieu, E. Dubois, D. Yarekha, N. Breil, N. Reckinger, X. Tang, J. Ratajczak, A. Laszcz |
Materials Science and Engineering B, 154–155, pp 159–162, Dec 2008 |
Impact of channel doping on Schottky barrier height and investigation on p-SB MOSFETs performance |
[13] |
G. Larrieu, D. Yarekha, E. Dubois, N. Breil, O. Fainot |
To appear in IEEE Electron Device Letters, December 2009 Digital Object Identifier: 10.1109/LED.2009.2033085 |
Arsenic-Segregated Rare Earth Silicide Junctions: Reduction of Schottky Barrier and Integration in Metallic n-MOSFETs on SOI |
[14] |
G. Larrieu, D. Yarekha, E. Dubois, D. Deresmes, N. Breil, N. Reckinger, X. Tang, A. Halimaoui |
Electro Chemical Society ECS transactions, vol. 19, n° 4, pp 201-207 May 2009 |
Issues associated to rare earth silicide integration in ultra thin FD SOI Schottky barrier nMOSFETs |
[15] |
R. Rengel, E. Pascual, M. J. Martín |
IEEE Electron Device Letters vol. 28, pp. 171-173 Feb. 2007 |
Injected current and quantum transmission coefficient in low-Schottky barriers: WKB and Airy approaches |
[16] |
E. Pascual, R. Rengel, M. J. Martín |
Semiconductor Science and Technology, vol. 22, p 1003, Sep. 2007 |
Microscopic modelling of reverse biased Schottky diodes: influence of non-equilibrium transport phenomena |
[17] |
J. Lusakowski, M. J. Martín, R. Rengel, T. González, R. Tauk, Y. M. Meziani, W. Knap, F. Boeuf,T. Skotnicki |
J. Applied Phys., vol. 101, pp. 114511, Jun. 2007 |
Quasiballistic transport in nanometer Si metal oxide – semiconductor field – effect transistors: Experimental and Monte Carlo analysis |
[18] |
E. Pascual, R. Rengel, N. Reckinger, X. Tang, V. Bayot, E. Dubois, M. J. Martín |
Phys. Status Sol. C, Curr. Top. Solid State Phys., 5, 1 pp 119-122, 2008 |
Monte Carlo analysis of carrier transport in fabricated back-to-back Schottky diodes: influence of direct quantum tunnelling and temperature |
[19] |
E. Pascual, M.J. Martín, R. Rengel, G. Larrieu, E. Dubois |
Semiconductor Science and Technology 24, 025022, Feb 2009 |
Enhanced carrier injection in Schottky contacts using dopant segregation: A Monte Carlo research |
[20] |
R. Valentin, E. Dubois, J-P Raskin, G. Larrieu, G. Dambrine, T. C. Lim, N. Breil, F. Danneville |
IEEE Trans. Electron Devices, vol. 55, pp 1192-1202, May 2008 |
RF Small Signal Analysis of Schottky-Barrier p-MOSFETs |
[21] |
R. Valentin, E. Dubois, G. Larrieu, N. Breil, J.P. Raskin, G. Dambrine, F. Danneville |
IEEE Electron Device Letters, vol.30, n°11 pp. 1197-1199, November 2009 |
RF performance of valence band-edge metallic S/D junctions in SOI MOSFETs via dopant segregation engineering |
[22] |
A. Laszcz, J. Katcki, J. Ratajczak, X. Tang, E. Dubois |
Journal of Microscopy - Oxford, vol. 224, pp38-41, Oct. 2006 |
TEM characterisation of the erbium silicide formation process using a Pt/Er stack on the silicon-on-insulator substrate |
[23] |
A. Laszcz, J. Katcki, J. Ratajczak, A.Czerwinski, N. Breil, G. Larrieu, E. Dubois |
Nuclear Instruments and Methods in Physics Research B, vol. 253, pp 274-277, Dec 2006 |
TEM study of PtSi contact layers for Low Schottky Barrier MOSFET |
[24] |
J. Ratajczak, A. Laszcz, A. Czerwinski, J. Katcki, F. Phillipp, P.A. Van Aken, N. Reckinger, E. Dubois |
Accepted in Journal of Microscopy |
Transmission electron microscopy study of erbium silicide formation from Ti/Er stack for Schottky contact applications |
[25] |
J. Katcki, J. Ratajczak, A. Laszcz, A. Czerwinski, N. Reckinger, X. Tang, G. Larrieu, N. Breil, D. Yarekha, E. Dubois |
Accepted in Journal of Microscopy |
Analysis of silicides formation for Schottky barrier contacts applications |
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International Conferences |
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[26] |
G. Larrieu E. Dubois X. Wallart J. Katcki |
210th ECS Meeting, Oct 29-Nov 3, 2006, Cancun, Mexico |
Iridium silicide: a promising electrode for metallic source/drain in decananometer MOSFETs |
[27] |
N. Breil, A. Halimaoui, E. Dubois, G. Larrieu, J. Ratajczak, G. Rolland, A. Pouydebasque, T. Skotnicki |
Proceedings of the 211th Electrochemical Society Meeting, ECS, May 2007, Chicago |
An Original Selective Etch of Pt vs. PtSi using a Low Temperature Germanidation Process |
[28] |
N. Breil, E. Dubois, Y. Morand, V. Carron, A. Halimaoui, T. Skotnicki |
Proceedings of Materials for Advanced Metallization MAM’07, 4-7 March 2007, Bruges |
Erbium Silicide Formation under Ultra High Vacuum |
[29] |
N. Breil, A. Halimaoui, E. Dubois, E. Lampin, L. Godet, G. Papasouliotis, G. Larrieu, T. Skotnicki |
MRS-Spring Meeting, Mater. Res. Soc. Symp. Proc. Volume 1070, 24-28 April 2008 |
Investigation on the Platinum Silicide Schottky Barrier Height Modulation using a Dopant Segregation Approach |
[30] |
G. Larrieu, D. Yarekha, E. Dubois, N. Breil, N. Reckinger, X. Tang, A. Halimaoui |
215th Electrochemical Society Meeting ECS, 24-29, 2009 |
Issues associated to rare earth silicide integration in ultra thin FD SOI Schottky barrier nMOSFETs |
[31] |
D. Yarekha, G. Larrieu, N. Breil, E. Dubois, S. Godey, X. Wallart, C. Soyer, D. Remiens, N. Reckinger, X. Tang, A. Laszcz, J. Ratajczak, A. Halimaoui |
215th Electrochemical Society Meeting ECS, 24-29, 2009 |
UHV Fabrication of the Ytterbium Silicide as Potential low Schottky Barrier S/D Contact Material for n-type MOSFET |
[32] |
N. Breil, E. Dubois, A. Pouydebasque, T. Skotnicki |
Silicon Nanoelectronics Workshop, 10-11 June 2007, Kyoto |
Impact of n-type Channel Implantation on Performance of p-type Schottky Barrier MOSFETs |
[33] |
F.Cornu-Fruleux, J. Penaud, E. Dubois, P. Coronel, G. Larrieu, N. Breil, D. Delille, T. Skotnicki |
Silicon Nanoelectronics Workshop, 10-11 June 2007, Kyoto |
Dual Silicide Integration of Low Schottky-Barrier Source-Drain in a Spacer-First Damascene-Metal-Gate FinFET Architecture |
[34] |
G. Larrieu, E. Dubois, R. Valentin, N. Breil, F. Danneville, G. Dambrine, J.C. Pesant, J.P. Raskin |
International Electron Device Meeting, IEDM’07, Washington, December 2007 |
Low Temperature Implementation of Dopant-Segregated Band-edge Metallic S/D junctions in Thin-Body SOI p-MOSFETs |
[35] |
M. J. Martin, R. Rengel |
2nd Eurosoi Workshop, March 8-9, 2006, Grenoble |
A Monte Carlo Study of Downscaled FD SOI MOSFETs: Mean Free Paths and Transit Times evaluated through an improved treatment of simulation results |
[36] |
E. Pascual, R. Rengel, N. Reckinger, X. Tang, V. Bayot, E. Dubois, M. J. Martin |
15th International Conference on Nonequilibrium Carrier Dynamics in Semiconductors (HCIS-15), Tokyo, Jul. 2007 |
Monte Carlo analysis of carrier transport in fabricated back-to-back Schottky diodes: influence of direct quantum tunnelling and temperature |
[37] |
M.J. Martin, E. Pascual, T. Gonzalez, R. Rengel |
EUROSOI 2008 Conference Proceedings, January 23-25, 2008, Cork, Ireland pp 105-106 |
Ballistic transport and RF Noise in ultra-scaled SOI |
[38] |
E. Pascual, R. Rengel, M.J. Martín |
International Conference on Noise and Fluctuations ICNF 2009, Pisa, Italy |
Intrinsic Noise sources in a Schottky Barrier MOSFET: a Monte Carlo analysis |
[39] |
R. Valentin, A. Siligaris, G. Pailloncy, E. Dubois, G. Dambrine, F. Danneville |
6th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, San Diego, Jan 18-20, 2006 |
Influence of Gate Offset Spacer Width on SOI MOSFETs HF Properties |
[40] |
R. Valentin, E. Dubois, J.P. Raskin, G. Dambrine, G. Larrieu, N. Breil, F.Danneville |
7th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, San Diego, Jan 2007 |
Investigation of High Frequency Performance for Schottky-Barrier p-MOSFET |
[41] |
A. Laszcz, J. Katcki, J. Ratajczak, A.Czerwinski, N. Breil, G. Larrieu, E. Dubois |
e-MRS 2006 Spring Meeting, 29 May - 2 June 2006, Nice, France |
TEM study of PtSi contact layers for Low Schottky Barrier MOSFET |
[42] |
A. Laszcz, A.Czerwinski, J. Ratajczak, J. Katcki, N. Breil, G. Larrieu, E. Dubois |
e-MRS Fall Meeting, 4-6 Sep 2006, Warsaw Archives of Metallurgy and Materials, vol.51, pp.551-554(2006) |
TEM study of iridium silicide contact layers for Low Schottky Barrier MOSFET |
[43] |
A. Laszcz, J.Ratajczak, A. Czerwinski, J. Katcki, N. Breil, G. Larrieu, E.Dubois |
Proceedings of the 15th Conference - Microscopy of Semiconducting Materials, 2-5 April 2007, Cambridge, UK |
TEM study of the silicidation process in Pt/Si and Ir/Si structures. |
[44] |
J. Ratajczak, A. Laszcz, A. Czerwinski, J. Katcki, F. Phillipp, P.A. Van Aken, N. Reckinger, E. Dubois |
Conference on Electron Microscopy of Solids, June 8-11, 2008, Zakopane, Poland, also accepted to Journal of Microscopy |
Transmission electron microscopy study of erbium silicide formation from Ti/Er stack for Schottky contact applications |
[45] |
A. Laszcz, J. Ratajczak, A. Czerwinski, J. Katcki, V. Srot, F. Phillipp, P.A. van Aken, D. Yarekha, N. Reckinger, G. Larrieu, E Dubois |
Conference on Microscopy of Semiconducting Material, MSM XVI, 17-20 March 2009, Oxford., Also to be published in IOP Journal of Physics: Conference Series |
Characterization of ytterbium silicide formed in ultra high vacuum |
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Invited Presentations |
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[46] |
E. Dubois, G. Larrieu |
Symposium Diagnostics & Yield Advanced Silicon Devices and Technologies for ULSI Era, June 25-28, 2006, Warszawa, Poland |
40 nm PtSi-based Schottky-Barrier p-MOSFETs with a Midgap Tungsten Gate |
[47] |
E. Dubois, G. Larrieu |
International Workshop on Junction Technology, IWJT-2006, May 15-16, Shanghai, China |
Integration and Performance of Schottky Junction SOI Devices |
[48] |
J. Knoch, E. Dubois, G. Larrieu, N. Breil, X. Tang, N. Reckinger, V. Bayot |
SINANO-ESSDERC Workshop, Grenoble, 16 Sept. 2005 |
Recent advances in metallic source-drain engineering |
[49] |
E. Dubois, G. Larrieu, N. Breil, R. Valentin, F. Danneville, M. Ostling, P.E. Hellström, N. Reckinger, X. Tang, J.P. Raskin, S. Mantl, Q.T Zhao |
SINANO Workshop Nanoscale CMOS and beyond CMOS Nanodevices” Sept. 14, 2007, Munich |
Metallic Source/Drain architecture: status and prospects |
[50] |
E. Dubois, G. Larrieu, N. Breil, R. Valentin, F. Danneville, D. Yarekha, G. Dambrine, A. Halimaoui, A. Pouydebasque, T. Skotnicki |
Proc. of International Workshop on Junction Technology, IWJT-2008, pp 139-144, May 15-16, Shanghai, China |
Recent advances in metallic source/drain MOSFETs |
[51] |
E. Dubois, G. Larrieu, N. Breil, R. Valentin, F. Danneville, D. Yarekha, N. Reckinger, X. Tang, A. Halimaoui, R. Rengel, E. Pascual, A. Pouydebasque, X. Wallart, S. Godey, J. Ratajczak, A. Laszcz, J. Katcki, J.P. Raskin, G. Dambrine, A. Cros, T. Skotnicki |
8th Symposium Diagnostics & Yield Advanced Silicon Devices and Technologies for ULSI Era, June 22-24, 2009, Warszawa, Poland |
Metallic Source/Drain Architecture for Advanced MOS Technology: an overview of METAMOS results |
[52] |
E. Dubois, G. Larrieu, N. Breil, R. Valentin, F. Danneville, D. Yarekha, C. Krzeminski, E. Lampin, J.M. Droulez, N. Reckinger, X. Tang, A. Halimaoui, R. Rengel, E. Pascual, A. Pouydebasque, X. Wallart, S. Godey, J. Ratajczak, A. Laszcz, J. Katcki, J.P. Raskin, G. Dambrine, A. Cros, T. Skotnicki |
SINANO-NANOSIL Workshop Silicon-based CMOS and Beyond-CMOS Nanodevices, September 18, 2009, Athens |
Metallic source/drain for advanced MOS architectures: from material engineering to device integration |
[53] |
F. Danneville, R. Valentin, E. Dubois, G. Dambrine |
4th International Symposium on System Construction of Global-Network-Oriented Information Electronics, Sendai, January 25, 2007 |
High Frequency Figures of Merit of conventional and Schottky barrier MOSFETs |
[54] |
E. Dubois |
Invited Lecture International Summer School on Advanced Microelectronics, MIGAS’08, Nanoscale CMOS and Si-based Beyond CMOS Nanodevices 28th June - 4th July 2008, Autrans/Grenoble |
Schottky source-drain contacts |
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Patents |
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[55] |
E. Dubois |
Patents FR2805395, published 24 August 2001. European Patent EP1258042 published 20 Nov 2002, International WO0163677 published 30 Aug 2001. CA2399115 published 20 Aug 2002 US6774451 published 10 Aug 2004 |
MOS transistor for high density integrated circuit’ |
[56] |
A. Halimaoui |
Patents FR2896339 US2007197029 JP2007194632 Published 20 July 2007 |
Procédé de retrait sélectif d'un métal non–siliciuré |
[57] |
F. Fruleux, E. Dubois, J.Penaud, P. Coronel |
French Patent FR2905800 published 14 March 2008 |
Multigate i.e. dual gate, fin-FET manufacturing method for computing equipment, involves forming wall i.e. spacer, that delimits cavity, in matrix layer, where wall has structural properties that are different from rest of matrix layer |
[58] |
G. Larrieu, E. Dubois |
French Patent FR2930073 (A1) published 2009-10-16 |
Procédé de fabrication de transistors complémentaires de type n et p et dispositifs électroniques comprenant de tels transistors et processeur contenant au moins un tel dispositif |
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